1. Field of the Invention
The present invention relates to a production system for semiconductors or the like, and more particularly, to a manufacture apparatus suitable for implementing the semiconductor production line as a flexible mass production line.
2. Description of the Prior Art
As described in Japanese Patent Laid-Open No. 59-213142 (1984), a conventional wafer carrier has the structure comprising a carrier with grooves for storing about 30 wafers, a container case for loading therein the carrier, and a top lid of the case.
Therefore, whenever wafers are processed by an apparatus with the capability of processing less than 30 wafers at a time, the wafers are divided into groups each including the required number of wafers, and stored in a plurality of carriers each capable of storing about 30 wafers by opening/closing the top lids of the respective carriers and using a jig such as a vacuum suction pincette, for subsequent transportation and stock. Thus, the number of carriers is increased relatively in comparison with the number of wafers residing in the manufacture process, so there has been a fear of reducing respective efficiency of transportation, stock and storage of wafers.
Further, the diameter of wafers used has been increased step by step and those wafers having the diameter in range of 120 mm to 200 mm are becoming most widely used in the art. From the viewpoints of the standard of semiconductor manufacture apparatus and the storage efficiency of wafers, however, the pitch of a groove for storage of wafers is restricted to a very narrow limit of about 6 mm withstanding such an increase in the diameter of wafers. For the reason, when larger-diameter wafers of 200 mm are manually transferred into a carrier with the conventional structure using a pincette, not only the wafers are more likely susceptible to defects, for example, cracks, chipping and so on, but also transfer operation of the wafers onto a jig specific for the apparatus extremely lowers the operation efficiency.
Since the semiconductor manufacture process for the next generation requires the processing accuracy in order of submicrons, more positive protection than now will be required against contamination due to dust in the atmosphere during transportation and stock of wafers. However, carriers with the conventional structure have accompanied a problem that wafers have to be stored, stocked or taken out while keeping their opening portions for storage facing upward, and hence very likely susceptible to contamination due to dust int he environment.
On the other hand, conventional container cases (with capacity of loading about 30 wafers per case) have tendency to prolong the period of production time, because their loading capacity unit does not match with the capacity of production line for processing wafers, and hence a waiting time occurs for each container case.
Meanwhile, to date, there has been practiced a wafer processing apparatus that a plurality of processing equipments necessary for the wafer process are arranged in the radial form around a ring-like wafer transporter line as the center, and wafers can be transferred in and out between the ring-like wafer transporter line and the respective processing equipments, as disclosed in Japanese Utility Model Laid-Open No. 60-176547, for example. However, this prior art has not taken into account the function of improving the productivity, and the function of controlling a flow of workpieces, when the wafers are sent to the processing equipments radially arranged.
Further, there is known a wafer transportation system that a transporter line is disposed in the upper space to reduce the amount of dust adhering onto a carrier box during transportation, as disclosed in Japanese Patent Laid-Open No. 60-229347, for example. There is also known a wafer transportation control method that the number of wafers to be transported to a wafer processing station is determined in consideration of the mean processing time, as disclosed in Japanese Patent Laid-Open No. 60-229348, for example. However, those techniques described in Japanese Patent Laid-Open Nos. 60-229347 and 60-229348 have not taken into account the function of implementing a mass production line under due consideration of an entire flow of workpieces.
Thus, the foregoing conventional wafer carrier jigs have not taken into account adaptation to an increase in the wafer size and large variations in the number of wafers to be processed for each of processing equipments in the semiconductor manufacture process for the next generation, adaptation to avoidance of damage on wafers at the time of wafer transfer and improvement of workability, as well as adaptation to transportation and stock while maintaining the wafer surfaces highly clean, with resulting problems of reduction in workability of storing and taking out wafers, efficiency of loading wafers into steps, and yield due to dust contamination.
In addition, the above-mentioned prior arts had no function of controlling a flow of respective lots of workpieces (wafers) and, particularly, were difficult to repeatedly apply the predetermined processing for each lot of various product groups. Also, when processing and producing lots of many different product groups, a flow of lots of wafers could not smoothly be controlled corresponding to various product groups.